Lead SoC Architect
IntelliPro Group Inc. · intelliprogroup.com
SunnyvaleLead / Manager10+ yrs
Straight from the company’s own careers site.
The job in short
SoC chip architecture design.
C++LinuxFPGASOCNetworking
Details
- Found
- 11 d ago · posted 2026-10-28
- Location
- Sunnyvale, CA
Full description
About the Opportunity
A semiconductor startup developing next-generation graphics processors is seeking an experienced Lead SoC Architect to own architecture definition and technical direction for advanced compute platforms.
This is a hands-on technical leadership role combining individual contribution with cross-functional engineering leadership. Candidates must be local to the Bay Area and able to work on-site in Sunnyvale.
Responsibilities
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Define top-level SoC architecture, subsystem partitioning, interface specifications, and microarchitecture requirements.
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Evaluate tradeoffs across performance, power, area, bandwidth, latency, and scalability.
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Lead performance modeling, workload analysis, and bottleneck identification using C/C++/SystemC or similar tools.
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Define memory hierarchy, NoC/interconnect strategy, cache structures, and coherency architecture.
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Evaluate and integrate third-party IP, including compute, memory, connectivity, multimedia, and security subsystems.
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Collaborate with RTL, verification, physical design, firmware, software, and systems teams throughout development.
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Partner with verification teams on architectural test plans and validation strategies.
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Support silicon bring-up, debugging, performance tuning, and post-silicon optimization.
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Contribute to long-term technology and product roadmaps.
Required Qualifications
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Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
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10+ years of experience in SoC architecture, ASIC development, or complex semiconductor system design.
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Strong understanding of modern SoC architectures and subsystem integration.
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Expertise in one or more of the following:
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CPU, GPU, or NPU architectures
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NoC/interconnect architectures
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Cache coherency protocols, including CHI, ACE, or CXL
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High-speed interfaces such as PCIe, UCIe, or Ethernet
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Memory systems such as DDR5, LPDDR5X, or HBM
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Power and performance optimization
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Strong knowledge of RTL development and verification methodologies.
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Experience with architecture modeling and performance analysis tools.
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Understanding of firmware/software interaction in complex SoC systems.
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Strong problem-solving, communication, and technical leadership skills.
Preferred Qualifications
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Experience with AI accelerators, GPUs, networking, RISC-V, or datacenter SoCs.
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Experience with chiplet-based or multi-die architectures.
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Familiarity with advanced process technologies and package integration.
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Experience with emulation, FPGA prototyping, and system-level validation.
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Knowledge of Linux drivers, runtime software, or system software architecture.
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Prior technical leadership across cross-functional engineering teams.
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