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Lead SoC Architect

IntelliPro Group Inc. · intelliprogroup.com
SunnyvaleLead / Manager10+ yrs
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The job in short

SoC chip architecture design.

C++LinuxFPGASOCNetworking

Details

Found
11 d ago · posted 2026-10-28
Location
Sunnyvale, CA

Full description

About the Opportunity A semiconductor startup developing next-generation graphics processors is seeking an experienced Lead SoC Architect to own architecture definition and technical direction for advanced compute platforms. This is a hands-on technical leadership role combining individual contribution with cross-functional engineering leadership. Candidates must be local to the Bay Area and able to work on-site in Sunnyvale. Responsibilities • Define top-level SoC architecture, subsystem partitioning, interface specifications, and microarchitecture requirements. • Evaluate tradeoffs across performance, power, area, bandwidth, latency, and scalability. • Lead performance modeling, workload analysis, and bottleneck identification using C/C++/SystemC or similar tools. • Define memory hierarchy, NoC/interconnect strategy, cache structures, and coherency architecture. • Evaluate and integrate third-party IP, including compute, memory, connectivity, multimedia, and security subsystems. • Collaborate with RTL, verification, physical design, firmware, software, and systems teams throughout development. • Partner with verification teams on architectural test plans and validation strategies. • Support silicon bring-up, debugging, performance tuning, and post-silicon optimization. • Contribute to long-term technology and product roadmaps. Required Qualifications • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. • 10+ years of experience in SoC architecture, ASIC development, or complex semiconductor system design. • Strong understanding of modern SoC architectures and subsystem integration. • Expertise in one or more of the following: • CPU, GPU, or NPU architectures • NoC/interconnect architectures • Cache coherency protocols, including CHI, ACE, or CXL • High-speed interfaces such as PCIe, UCIe, or Ethernet • Memory systems such as DDR5, LPDDR5X, or HBM • Power and performance optimization • Strong knowledge of RTL development and verification methodologies. • Experience with architecture modeling and performance analysis tools. • Understanding of firmware/software interaction in complex SoC systems. • Strong problem-solving, communication, and technical leadership skills. Preferred Qualifications • Experience with AI accelerators, GPUs, networking, RISC-V, or datacenter SoCs. • Experience with chiplet-based or multi-die architectures. • Familiarity with advanced process technologies and package integration. • Experience with emulation, FPGA prototyping, and system-level validation. • Knowledge of Linux drivers, runtime software, or system software architecture. • Prior technical leadership across cross-functional engineering teams.

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