Principal Design Engineer
Microsoft · microsoft.com
RaleighLead / Manager3+ yrs
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The job in short
RTL logic design for high-performance AI silicon IP and SoC.
PythonMachine learningSOCLegalVerilog
Details
- Found
- 5 d ago · posted 2026-11-07
- Location
- Raleigh, NC, US
Full description
Deliver premium-quality silicon designs that push the boundaries of what is possible. Develop cutting-edge custom Intellectual Property (IP) and System-on-Chip (SoC) designs. Build solutions capable of complex, high-performance functions with exceptional efficiency. Bring passion, drive, and intellectual curiosity to solving challenging Computer and Electrical Engineering problems. Serve as an integral member of the digital logic design team developing AI components, with a focus on microarchitecture-based functions and features. Own logic design and Register Transfer Level (RTL) implementation for high-performance digital IP. Drive design quality across Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), power, and related design requirements. Support timing closure and optimization of high-performance digital IP. Collaborate with verification teams to ensure implementations meet architectural and microarchitectural intent. Partner with Physical Design (PD), Design for Test (DFT), and other engineering teams to evaluate and optimize design tradeoffs. Provide technical leadership through mentorship, collaboration, and teamwork. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 15+ years of experience in logic design delivering complex solutions 10+ years of experience in one or more of the following - floating point arithmetic and datapath design, DMA design, subsystem designs/integration, or custom logic design 5+ years of experience leading logic design teams Multiple successful ASIC tape outs in deep sub-micron technologies Experience with scripting languages such as Python or Perl Experience debugging designs as well as simulation environment Knowledge of verification principles, testbenches, UVM, and coverage Experience working on Artificial Intelligence (AI) / Machine Learning (ML) SoCs Working knowledge of writing assertions, coverage and formal verification
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