Job Description Job Summary: Sr/ Digital IP Design Manager Location: Bangalore, India Company: onsemi Role Overview onsemi is seeking a Digital IP Design Manager to manage the design of digital datapath and subsystem IP for next-generation CMOS image sensors and the onsemi Treo platform. This role will manage a talented sub-team of digital design engineers, drive technical execution, and help shape the future of scalable, automotive‑grade digital IP design. The ideal candidate combines strong hands-on digital design expertise with necessary experience of people leadership, and a forward-looking mindset, including curiosity around how AI and automation can improve digital design productivity and cycle time. Responsibilities Key Responsibilities Technical Leadership • Lead the design of digital datapath IP and modules for CMOS image sensors, including high‑performance, low‑power pipelines. • Drive development of core platform digital-on-top and subsystem IP for the onsemi Treo platform. • Ensure IP meets automotive quality, safety, and reliability requirements (e.g., robustness, configurability, reuse). • Partner closely with architecture, DV, PD, analog, mixed-signal, system, full-chip integration, firmware, and software teams to deliver end-to-end solutions. • Provide technical guidance on RTL quality, low-power design, clocking/reset strategies, and design-for-test to design engineers. • Participate in technical reviews, risk assessment, and post-silicon learning. Team & People Management • Lead and mentor talented digital IP designers. • Bring quality, flow and schedule focus to the team. • Foster collaboration, accountability, innovation and continuous improvement. Innovation & Productivity • Stay curious and engaged with emerging trends, especially AI/ML-driven approaches to: • RTL generation and review • Integration and Si debug productivity • Design-space exploration • Champion adoption of tools and processes that reduce cycle time and improve first-time-right outcomes #LI-VS1 Preferred / Nice-to-Have Qualifications • Experience with CMOS image sensor digital pipelines or imaging-related IP. • Familiarity with platform or subsystem-level IP development. • Exposure to functional safety concepts relevant to automotive products. • Experience driving or adopting EDA automation, scripting, or AI-assisted workflows. • Prior experience scaling or building a new team. #LI-VS1 Qualifications Required Qualifications • 12+ years of overall experience in digital IC design. • 3+ years of proven people management or technical leadership experience. • Strong background in digital IP or SoC development. • Experience working on Automotive IP or automotive semiconductor products. • Hands-on experience with: • RTL design (SystemVerilog / Verilog) • Low-power design techniques • IP reuse and configurability • Demonstrated ability to lead cross-functional technical efforts. • Strong communication skills and the ability to influence across teams and geographies. #LI-VS1