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FPGA VHDL Design Engineer US Citizenship required

Sciencereferralnetwork · sciencereferralnetwork.com
Tucson
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Principal Embedded Software Engineer
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FPGA Engineer
Quest Defense Systems & Solutions, Inc. · Tucson · found 6 d ago

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The job in short

FPGA VHDL design engineering.

VerilogFPGASOC

Details

Found
25 d ago · posted 2020-05-06
Location as listed
Tucson, AZ, US
Role
Embedded / Firmware Engineer
Source
The company’s own careers site

Full description

Company Description About Science Referral Network We maintain a global network of well connected professionals in science, technology, engineering, and mathematics who are interested in working with us to help organizations recruit and hire the right technical talent for even the most specialized of tasks. Our network consists of both subject matter experts in a wide variety of technical areas and senior leaders at some of the world's most innovative, cutting edge organizations. We employ a system of strategic research and confidential targeted crowdsourcing throughout this network to help our clients identify and hire the talent they need. Much more than just a database, we are continually working to strengthen all of the individual connections that make up our network. We strive to develop mutually beneficial, trusting relationships by actively engaging with our network members. This creates the confidence and collaboration that is necessary for our continued success. We believe that our integrity is our greatest asset and we value people over process. We are steadfast in our commitment to the highest ethical principles in all of our business dealings and endeavor to add value in any way we can. Job Description We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions available at all levels. The job description is below. If you are still available please send an updated resume, your salary requirements, date of availability, and your citizenship status (***OUR CLIENT CANNOT ACCEPT H1B, H2B, F1, TN1 VISAS OR GREEN CARD CANDIDATES***). We cannot work with outside parties or do C2C. This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. Thank you! Dee Smith Qualifications This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement. Employment is contingent on other factors, including, but not limited to, background checks and drug screens Required Skills for Principal Electrical Engineer (ASIC Design) FPGA ASIC design experience required. Knowledge and experience including: - Development of design documentation - Application of configuration management tools - Application of standard ASIC development design flows and methodologies for SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC development tools Candidates must have broad technical knowledge and experience and be expert in the design of complex ASICs. Must have written VHDL, simulated, synthesized, placed and routed, integrated and tested designs on target hardware. Candidates must have an understanding and appreciation of technical themes and concepts and the ability to develop solutions independently, but also be able to work with systems engineers, software teams and peers to define requirements. Candidates must be able to develop technical solutions to complex problems that require the regular use of ingenuity and creativity. Demonstrated experience and success in applying best in class design methodologies and tools is required. Working knowledge of Microsoft Office products required. Candidates must be highly motivated, high performers with excellent verbal and written communication skills and a strong desire to learn and contribute in a fast-paced team environment. Candidates must be able to apply extensive technical expertise, and have knowledge of other disciplines related to FPGA and ASIC design. Ability to perform work without appreciable direction is required. Exceptional communication and leadership skills are required. Experience working in a distributed design and development environment, including tools and methodologies is required. Desired Qualifications: - FPGA design experience or desire to perform FPGA design - Knowledge and experience in the use of assertions - UVM/OVM experience - Cryptographic experience highly desired Knowledge and experience in the design of FPGA for gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces highly desired. Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology highly desired. Knowledge of C programming and scripting languages such as Perl or Python highly desired. Knowledge of embedded systems design using Microblaze, Nios or ARM processors a strong plus. FPGA design experience using a Linux based development environment highly desired. Required Education: Bachelor of Science in Electrical Engineering Desired Education: Master of Science in Electrical Engineering ABOUT OUR CLIENT: 14,000 employees Headquartered in Tucson, Ariz. World's largest developer, producer and integrator of weapon systems More than 1.5 million missiles produced since 1954 Broad weapons portfolio Missiles Smart munitions Projectiles Kinetic kill vehicles Directed energy weapons Mounted reconnaissance, surveillance and target acquisition Customers: All U.S. military services; allied forces of more than 50 countries Additional Information All your information will be kept confidential according to EEO guidelines. This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance.

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