Design Verification Engineer
Mirafra Technologies · mirafra.com
San Diego
The job in short
Hardware design verification for semiconductor chips using SystemVerilog and UVM.
C++EmbeddedVerilog
Details
- Found
- 23 d ago · posted 2017-05-29
- Location as listed
- San Diego, CA, US
- Role
- Engineer (other)
- Source
- The company’s own careers site
Full description
Company Description
Mirafra is a global product engineering services company with expertise in semiconductor design, embedded and application software.
Job Description
Job Title : Design Verification Engineer
Job Type : Full time
Location : San Diego And Bay Area
Job Description :
Strong verification skills: test planning, problem solving, debug,
adversarial testing. Multimedia Camera Image processing, Video or graphics
hardware experience is preferred.
Strong working knowledge of HVLs: System Verilog, VERA/e-Specman, System C.
Experience with methodologies like RVM/VMM/OVM/UVM. RTL design experience
and/or very strong OOPs programming experience is also a plus.
Good written and oral communications skills required.
Experience with simulation acceleration tool like Veloce/Palladium is a plus.
Skill required:
CPU, (MC: middle core, ARM architecture)
Decent knowledge of assertions.
SV and decent UVM knowledge
Code coverage.
Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting.
Additional Information
All your information will be kept confidential according to EEO guidelines.
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