Formal Verification Engineer
Mirafra Technologies · mirafra.com
San Diego
The job in short
Formal verification of software and hardware.
JavaC++LinuxVerilog
Details
- Found
- 23 d ago · posted 2017-03-31
- Location as listed
- San Diego, CA, US
- Role
- QA / Test Engineer
- Source
- The company’s own careers site
Full description
Company Description
About Mirafra :
Mirafra is software service base organization started in 2004.
We are 500+ employees in India and 250+ In US
Clear visibility to senior management which helps for constant professional growth
Job Description
Experience with the following: - ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Design and assertion languages: VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal Verification is a must
Qualifications
Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming languages: C, C++, and SystemC - Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion
Additional Information
All your information will be kept confidential according to EEO guidelines.
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