Principal Layout Job Description: In this role layout engineer with closely work with analog design team to layout and verify custom analog/mixed-signal IPs Lead full-custom IC layout design and verification, including chip floor planning, analog IP layout and chip level layout integration of various analog, mixed signal and ASIC blocks Full verification of Block level and top-level layout including extraction, DRC, LVS, and DFM checking Layout schedule planning and working with other IP layout engineers to integrate various layout blocks Co-work with designers on block level and top-level floor planning Layout review for power/gnd routing, electro migration, signal path check, matching, and signal coupling