Position Purpose/Summary: The R&D Engineering Technician II operates with moderate autonomy to execute complex semiconductor/next-generation optical workflows. This role supports the Engineer staff by running engineering experiments (DOEs), troubleshooting equipment issues, and independently managing wet and dry chemical processes across multiple custom New Product Introductions (NPIs). Supports running wafers to complete RNSOs. Essential Duties: • Autonomous Chemical Processing: Independently prepare, qualify, and handle hazardous wet chemistries, including thin-film sol-gel optimization for sub-100nm pitch applications. • Advanced Operations: Operate specialized lithography tools, front-to-back alignment systems, and run advanced wet/dry etch recipes (Si, SiO2, ZrO2) with minimal supervision. • Off-Shift Coordination: Manage the cleanroom floor independently during off-shift hours, ensuring production continuity and driving comprehensive shift handover documentation. • Metrology & Inspection: Independently perform advanced metrology using variety of measure and inspection tools to generate data for technical loops. • Experiment Execution: Run Design of Experiments (DOEs) for thin-film sol-gel chemistry qualification based on engineering plans. • First-Line Troubleshooting: Diagnose and resolve minor equipment hardware anomalies, such as wafer clamping issues on non-standard substrate thicknesses (e.g., 1.6mm fused silica). • Other relevant duties as assigned Key Competencies: To perform the job successfully, an individual must demonstrate the following competencies to perform the essential functions of this position. • Chemical Proficiency: Proven experience in autonomous wet chemical handling, chemical hygiene, and hazardous material disposal protocols. • Schedule Flexibility: Proven track record or willingness to work independently off-shift, night, or weekend schedules. Education and Experience: • Associate degree or higher in a STEM discipline, or equivalent military/industrial training. • 2-5 years of hands-on experience in a semiconductor wafer fabrication cleanroom. • Proficiency with cleanroom tools, basic Statistical Process Control (SPC), and operational knowledge of AFM systems.