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The job in short
Digital engineering internship.
SpringVerilogFPGA
Details
- Found
- 11 d ago · posted 2026-10-13
- Location as listed
- Neenah, WI,US, US
- Role
- Intern / Trainee
- Source
- The company’s own careers site
Full description
Our commitment to pay range transparency fosters an equitable workplace, where everyone can feel valued. This is an internship position (Non-Exempt Salary); the hourly range is stated below. The rate offered within this range will be based upon the geographic location, work experience, education, licensure requirements and/or skill level. Hourly Rate:
$23 - $27/hr.
OVERVIEW
To develop hardware and system concepts that satisfy our customers' requirements.
RESPONSIBILITIES
* Implement and verify the hardware design by using the appropriate EDA tools
* Deliver prototype hardware to customers by implementing physical hardware design components, capturing schematics and supervising PCB layouts
* Develop project documentation in accordance with quality and change management procedures and guidelines to ensure project information is properly organized and archived
* Participate in performance review to ensure employee continuous improvement and growth
* Utilize schematic capture tools and guide printed circuit board layout
* Analyze circuit designs with simulation tools such as SPICE and finite element tools
* Perform hands-on, in-the-lab, troubleshooting and bring up of prototype hardware
* Take detailed measurements of analog hardware using standard electrical measurement tools including oscilloscopes, multimeters, spectrum analyzers, and network analyzers to assess circuit performance and inform design improvements
* Work as a team with other analog, digital, software, and mechanical engineers to review and improve hardware designs
* Receive expert mentorship, guidance, and coaching from experienced hardware engineers
MINIMUM QUALIFICATIONS
* Student working toward a Bachelor’s degree in Electrical/Electronics/Computer Engineering for the entire duration of internship.
PREFERRED QUALIFICATIONS
* Sophomore or Junior level status
* GPA: 3.0 or higher is preferred
* Relevant course work in FPGA design and test benching (VHDL / Verilog / System Verilog) or Circuit Design and Layout
This document does not represent a contract of employment and is not intended to capture every possible assignment the incumbent could be asked to perform.
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