Entry Level DFT Design Engineer
Freescale Semiconductor · freescale.com
Austin (OakhillEntry level
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The job in short
Design for test chip engineering.
PythonVLSIVerilogSOC
Details
- Found
- 5 d ago · posted 2026-10-19
- Location as listed
- Austin (Oakhill, Office)
- Role
- Electrical / Electronics Engineer
- Source
- The company’s own careers site
Full description
In this role, you will:
- Participate in global Design teams bringing new microprocessor based SoC designs through initial test requirements to generating and supporting DFT structural test pattern debug and into full scale production.
- Team functions include test pattern specification and creation, pre-silicon verification, pattern conversions to ATE, and post-silicon pattern debug.
- Team is a part of the design organization and supports the Test Engineering team with the patterns for manufacturing test, qualification, yield enhancement, and product performance analysis.
- Team serves as focal point in interfacing with Test Engineering, Product Engineering, and Fab for the Design team.
- Team specifies built-in test features for the designs, implements, and validates the design. Team is responsible for delivery of all DFT test patterns for the product.
Qualifications:
•
Recent graduate (0-2yrs) with Bachelors or Masters in Engineering: EE, Computer Engineering, CS, EET, or equivalent
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Python, Verilog, Perl, Tcl, and Unix.
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Experience with multiple aspects of the following:
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Structural Test design requirements
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ATPG, Test Coverage, Fault Universe
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JTAG, BSDL
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Memory and Logic BIST
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DFT Logic
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Knowledge/experience with ATPG / DFT tools: FastScan; LBIST, MBIST , DFTCompiler, etc.
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Semiconductor Testing
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ATE VLSI Tester programming and usage (J973, Tiger/Catalyst, UltraFex, or Verigy 93000, ) a plus
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Knowledge/experience with functional pattern test
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Must possess excellent oral and written communication skills and be to partner with team members from other departments, disciplines, and cultures to achieve common goals in a high performance culture. Must have proven track record of being able to work with minimal direction and still meet schedules
•
Must be able to multi-task and prioritize tasks to meet customer needs
Anticipated hire date: Q1 2027
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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