SoC Hardware (Power Management) Validation Engineer
Microsoft · microsoft.com
HillsboroEntry level1+ yrs
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The job in short
Chip power management hardware validation.
SOCLegal
Details
- Found
- 5 d ago · posted 2026-10-19
- Location as listed
- Hillsboro, OR,US, US
- Role
- Electrical / Electronics Engineer
- Source
- The company’s own careers site
Full description
The Compute Silicon & Manufacturing Engineering (CSME)'s Cloud Compute Development Organization (CCDO) is seeking a SoC HW Power Management Validation Engineer to join the post-silicon validation team for our projects. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner. As a technical individual contributor in this role on the team, you will: Own post-silicon validation and debug of Power Management features across CPU cores, mesh, memory, I/O, package, and platform power domains. Develop and execute comprehensive validation strategies for power states, DVFS, idle and active power management, thermal management, performance-per-watt optimization, and system-level power features. Drive root-cause analysis of complex silicon, firmware, hardware, and software issues impacting power, performance, stability, and feature readiness. Define validation requirements, test plans, methodologies, automation frameworks, debug tools, and telemetry solutions to improve validation coverage and efficiency. Collaborate closely with architects, design, firmware, verification, system software, and platform teams to ensure first-time-right implementation of power management features. Lead silicon bring-up, feature characterization, workload-based validation, and power-performance correlation activities across development milestones. Analyze power, performance, and thermal telemetry to identify bottlenecks, validate design assumptions, and optimize platform efficiency. Influence pre-silicon verification strategies, coverage plans, and debug methodologies using post-silicon learnings. Provide technical leadership, mentoring, and guidance in Power Management architecture, validation techniques, and debug methodologies. Drive continuous improvement in validation infrastructure, automation, and debug capabilities to accelerate issue resolution and improve product quality. Partner across organizations to deliver high-quality silicon on schedule while meeting aggressive performance-per-watt and power efficiency targets. Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams. Verification, logic development, analog validation, or validation tools experience as part of a CPU, SoC and/or IP development team Leadership skills Validation of: Power validation and Performance testing plus tuning. Automation, Content Creation, or Tools/Scripts Development Ability to develop synthetic SoC validation Core, Coherency, Memory, and IO content to run on both bare metal and OS environments. Ability to develop sophisticated tools/scripts to support SoC validation debug activities such as maximum power, current transients, and register dumps. Understanding of board level schematics. Understanding system level software and firmware. Experience running silicon content on pre-silicon platforms such as emulation or FPGA. Demonstrated success in hardware/software debug efforts.
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