Lead AVV Engineer
Texas Instruments · edbz.com
BengaluruLead / Manager5+ yrs
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The job in short
Lead silicon functional validation for automotive MCUs.
EmbeddedFPGASOC
Details
- Found
- 5 d ago · posted 2026-10-21
- Location as listed
- Bengaluru, Karnataka, India
- Role
- Engineer (other)
- Source
- The company’s own careers site
Full description
Change the world. Love your job.
About Team:
ASM Auto Group develops safety-compliant automotive MCUs for EV, HEV, traction inverters, onboard chargers, BMS, and body and chassis control. We are at a pivotal moment in automotive technology, and this role offers a chance to work on cutting-edge MCUs with real-world impact. If you want to solve complex technical challenges in fast-growing segments, we encourage you to apply.
Position Overview:
We are seeking an experienced AVV technical leader with 5+ years of pre-silicon and post-silicon functional validation experience to own subsystem-level validation strategy for automotive MCUs. You will define functional validation methodology, lead complex root-cause investigations, drive functional bring-up on silicon, and make evidence-based silicon readiness recommendations. You will work as a technical peer with Architecture, Design, RTL Verification, and Firmware teams.
Key Responsibilities:
• Own functional validation strategy and sign-off for complex subsystems (e.g., Ethernet MAC, functional safety, clock/reset/power, multicore interactions)
• Define requirements-to-test traceability, functional coverage closure criteria, and sign-off readiness
• Architect reusable validation frameworks spanning emulation platforms and silicon test environments
• Lead first-silicon functional bring-up and silicon functional test execution
• Lead complex root-cause analysis across firmware, RTL, emulation models, and silicon
• Validate cross-peripheral interactions with DMA, interrupts, clock switching, and low-power transitions
• Lead fault-injection campaigns and functional safety validation evidence (ISO 26262)
• Define pre-silicon to post-silicon correlation and test reuse strategy
• Architect and maintain automation and CI/CD-integrated regression infrastructure
• Define and own performance and benchmarking strategy, including throughput, latency, and timing-margin target.
• Lead resolution of customer-reported issues through reproduction and root-cause analysis
• Define fix or workaround recommendations for customers and drive them to closure
• Lead validation reviews and provide sign-off recommendations
• Mentor engineers and drive continuous improvement in methodology and tooling
Minimum requirements:
• Bachelor's degree in Electrical Engineering, ECE, Computer Engineering, or related field
• 5+ years of engineering experience working with silicon design and/or validation
• Experience with digital/embedded design on emulation/FPGA platforms/RTL simulation
Preferred Qualifications:
• Work experience with ARM architecture
• Advanced embedded C and firmware architecture knowledge
• MCU/SoC architecture understanding (multicore, coherency, boot, power domains)
• Expert-level peripheral validation, including complex interactions and error recovery
• Emulation platform experience (QuickTurn, Palladium, ZeBu) and test infrastructure design
• RTL and waveform debugging for SoC-level issues
• Deep understanding of ISO 26262, AUTOSAR, and CAN FD / LIN / Ethernet
• Functional safety subsystem validation and safety-case evidence
• Complex DMA and bus (arbitration, ordering, timeout) validation
• SystemVerilog and advanced RTL debugging
• Track record of building and mentoring validation teams, or publishing technical work
• Excellent technical communication and documentation skills
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